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Contents ..................: ICs Digital, Bipolar TTL Series 74H IEEE/DIN
Design DataBase File ......: d74h.ddb (28 KB; updated 26 May 2006)
Logical Library File ......: d74h.def (9 KB; updated 27 September 2006)
ZIP File ..................: d74h.zip (8 KB; updated 15 December 2006)
PDF File ..................: d74h.pdf (17 KB; updated 06 December 2007)
SCM Sheets ................: 0
SCM Symbols ...............: 25
SCM Labels ................: 0
SCM Markers ...............: 3
Layouts ...................: 0
Layout Parts/Footprints ...: 0
Layout Padstacks ..........: 0
Layout Pads ...............: 0
Last Change ...............: 09/05/2006 16:43:16 [GMT]
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Library D74H - SCM Symbols/Parts |
Symbol / Part |
Description / Function |
Package Assignment(s) |
Manufacturer(s) |
Marker |
SCM Sheets(s) using Symbol |
Last Change |
74h00 |
Quad 2 Input NAND Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h01 |
Quad 2 Input NAND Gate TTL Output: Open Collector |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h04 |
Hex Inverter TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h05 |
Hex Inverter TTL Output: Open Collector |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h10 |
Triple 3 Input NAND Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h11 |
Triple 3 Input AND Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h15 |
Triple 3 Input AND Gate TTL Output: Open Collector |
default dil14, so14 |
- |
pin |
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09/05/2006 |
74h20 |
Dual 4 Input NAND Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h21 |
Dual 4 Input AND Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h22 |
Dual 4 Input NAND Gate TTL Output: Open Collector |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h30 |
8 Input NAND Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
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09/05/2006 |
74h40 |
Dual 4 Input NAND Buffer TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h50 |
Dual 2 Wide 2 Input AND-OR-Invert TTL Output: Totem Pole |
dil14, so14 |
- |
pin |
|
09/05/2006 |
74h51 |
Dual 2 Wide 2 Input AND-OR-Invert Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h53 |
4 Wide 2 Input AND-OR-Invert Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h54 |
4 Wide 2 Input AND-OR-Invert Gate TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
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09/05/2006 |
74h60 |
Dual 4 Input Expander |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h72 |
J-K Flip-Flop, Preset + Clear TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
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09/05/2006 |
74h73 |
Dual J-K Flip-Flop, Clear TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
|
09/05/2006 |
74h74 |
Dual D-Flip-Flop, Preset + Clear TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
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09/05/2006 |
74h76 |
Dual J-K Flip-Flop, Preset + Clear TTL Output: Totem Pole |
default dil16, so16 |
- |
pin |
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09/05/2006 |
74h78 |
Dual J-K Flip-Flop, Common Clear/Clock TTL Output: Totem Pole |
default dil14, so14 |
- |
pin |
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09/05/2006 |
74h160 |
BCD Decade Counter, Direct Clear TTL Output: Totem Pole |
default dil16, so16 |
- |
pin |
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09/05/2006 |
74h259 |
8 Bit Addressable Set-Reset Latch TTL Output: Totem Pole |
default dil16, so16 |
- |
pin |
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09/05/2006 |
Library D74H - SCM Markers |
Marker |
Last Change |
junction |
21/04/1997 |
pin |
21/04/1997 |
terminal |
21/04/1997 |
Library D74H - ICs Digital, Bipolar TTL Series 74H IEEE/DIN © 1985-2024 Oliver Bartels F+E • Updated: 09 June 2013, 08:20 [UTC]
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